Image sensors have become ubiquitous. They are widely used in digital still cameras, cellular phones, security cameras, as well as, medical, automobile, and other applications. The technology used to manufacture image sensors, and in particular, complementary metal oxide semiconductor (CMOS) image sensors, has continued to advance at great pace. For example, the demands of higher resolution, higher quality images and lower power consumption have encouraged the further miniaturization and integration of these image sensors. However, column fixed pattern noise (FPN) is a known issue for CMOS image sensors. FPN is the spatial variation in pixel outputs under uniform illumination due to device and interconnect mismatches over the sensor. FPN may present itself in a resultant image as the same pattern of brighter or dimmer pixels occurring with images taken under the same conditions of temperature and exposure.
Various sampling methods may be used to reduce column FPN. For example, one method (e.g., correlated double sampling) may include resetting a pixel of the CMOS image sensor to a reference value, then sampling the reference value at the pixel (e.g., black level signal). During an actual image acquisition, the pixel is exposed to light and charged to produce a light signal (e.g., light level signal). This light signal is then compared to the sampled reference value (e.g., black level signal is subtracted from the light level signal) to arrive at a final value (e.g., the resultant image). This process is an attempt to eliminate noise from the final value and hence, the resultant image. However, conventional image sensors introduce a new offset noise due to the mismatch between individual components involved in sampling light and black level signals. In other words, the final value will be the light level signal minus the black level signal plus the offset noise. Typically, each pixel in a particular column will have the same offset because each column includes its own column sampling circuit. Pixels in another column will have another offset value. Accordingly, vertical lines forming column FPN will appear on the screen, when a detected image is displayed. Each vertical line represents a column in an imaging sensor and has a width corresponding to one pixel. The brightness of the line corresponds to the offset value of that particular column.
Furthermore, for example, one method (e.g., delta double sampling) may include the detection of the offset value of each column, then the detected offset value is deducted from the final value of pixels at that particular column. In this way, the final value can ideally be derived to have column FPN reduced. However, methods such as this involve signal subtractions, which may not have 100% accuracy because of non-linearity and variation of column sampling circuits. As a result, there is normally still a small portion of column FPN left (i.e., residual column FPN) even after methods such as correlated double sampling and/or delta-double sampling methods are applied.
In some instances a high signal gain is applied to the CMOS image sensor to “boost” an image during low lighting conditions. In these cases, the residual column FPN may become even more visible. Additionally, in mass-production of CMOS image sensors, fabrication process variations may make the column FPN worse for some chips. Furthermore, when running the sensor in bad conditions, such as very high or very low temperature, with a low supply voltage, and/or with a noisy power supply, the column FPN may become even worse. Thus, the resultant column FPN in image may be an obvious artifact that is very unpleasant to the human eye and may limit the yield of CMOS image sensors in mass-production.